Error Detection

Vertical Redundancy Check (VRC)

- Most common and inexpensive mechanism error detection which also called parity check.
- A redundant bit (parity bit) is appended to every data unit so that the total number of 1s in the unit becomes even, if there is even-parity check used.
- There are even-parity check and odd-parity check. For odd-parity check, the total number of 1s in the unit is odd.

- When the data unit is reached its destination, the receiver puts all eight bits through an even-parity checking function. If the receiver sees 11100001, it counts and gets four 1s, an even number.
- But if the receiver sees 11100101, or total number of 1s is odd. The receiver knows that an error has been occurred into the data somewhere and therefore rejects the whole unit.
- For the odd-parity checking, the principle is same but the calculation is different.
- The advantages of VRC are it can detect all single-bit errors. It also can detect burst errors as long as the total number of bits changed is odd (1,3,5, etc). The same holds true for any odd number of errors.
- The limitation is it cannot detect errors where the total number of bits changed is even, where the two bits of the data unit are changed. In this case, the total number of 1s is still even. The VRC checker will add them and return an even number although the data unit contains two errors. Then the unit will pass a parity check even through the data unit is damaged. The same holds true for any even number of errors.